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this is information on a product in full production. april 2015 docid025667 rev 3 1/18 STGIPS10K60A2 sllimm? small low-loss intelligent molded module ipm, 3-phase inverter, 10 a, 600 v short-circuit rugged igbt datasheet - production data features ? ipm 10 a, 600 v, 3-phase igbt inverter bridge including control ics for gate driving and free- wheeling diodes ? short-circuit rugged igbt ? v ce(sat) negative temperature coefficient ? 3.3 v, 5 v, 15 v cmos/ttl inputs comparators with hysteresis and pull-down resistor ? undervoltage lockout ? internal bootstrap diode ? interlocking function ? dbc substrate leading to low thermal resistance ? isolation rating of 2500 v rms /min ? 4.7 k ntc for temperature control ? ul recognized: ul1557 file e81734 applications ? 3-phase inverters for motor drives ? home appliances, such as washing machines, refrigerators, air conditioners description this intelligent power module provides a compact, high performance ac motor drive in a simple, rugged design. combining st proprietary control ics with the most advanced short-circuit- rugged igbt system technology, this device is ideal for 3-phase inverters in applications such as home appliances and air conditioners. sllimm? is a trademark of stmicroelectronics. sdip-25l table 1. device summary order code marking package packing STGIPS10K60A2 gips10k60a2 sdip-25l tube www.st.com
contents STGIPS10K60A2 2/18 docid025667 rev 3 contents 1 internal block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . 3 2 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1 control part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1.1 ntc thermistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.1 recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.1 sdip-25l package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.2 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
docid025667 rev 3 3/18 STGIPS10K60A2 internal block diagram and pin configuration 18 1 internal block diagram and pin configuration figure 1. internal block diagram l i n h i n h v g o u t l v g g n d l i n h i n h v g o u t l v g g n d l i n h i n v c c v boot b o o t h v g o u t l v g g n d l i n w o u t u v boot b o o t w v h i n w l i n u g n d n w l i n v v boot b o o t u h i n u v boot b o o t v o u t w h i n v p u o u t v w v c c t 1 n v n u t 2 n t c p p p in i n 1 6 p in i n 1 p i n 1 7 p in i n 2 5 v boot b o o t v c c v c c v boot b o o t am09364v1 a m 0 9 3 6 4 v 1
internal block diagram and pin configuration STGIPS10K60A2 4/18 docid025667 rev 3 figure 2. pin layout (bottom view) table 2. pin description pin symbol description 1out u high side reference output for u phase 2v boot u bootstrap voltage for u phase 3lin u low side logic input for u phase 4hin u high side logic input for u phase 5v cc low voltage power supply 6out v high side reference output for v phase 7v boot v bootstrap voltage for v phase 8 gnd ground 9lin v low side logic input for v phase 10 hin v high side logic input for v phase 11 out w high side reference output for w phase 12 v boot w bootstrap voltage for w phase 13 lin w low side logic input for w phase 14 hin w high side logic input for w phase 15 t 1 ntc thermistor terminal 1 16 t 2 ntc thermistor terminal 2 17 n w negative dc input for w phase 18 w w phase output 19 p positive dc input 20 n v negative dc input for v phase 21 v v phase output 22 p positive dc input 23 n u negative dc input for u phase 24 u u phase output 25 p positive dc input 0$5.,1*$5($
docid025667 rev 3 5/18 STGIPS10K60A2 electrical ratings 18 2 electrical ratings 2.1 absolute maximum ratings table 3. inverter part symbol parameter value unit v pn supply voltage applied between p - n u , n v , n w 450 v v pn(surge) supply voltage (surge) applied between p - n u , n v , n w 500 v v ces each igbt collector emitter voltage (v in (1) = 0) 1. applied between hin i , lin i and g nd for i = u, v, w. 600 v i c (2) 2. calculated according to the iterative formula: each igbt continuous collector current at t c = 25c 10 a i cp (3) 3. pulse width limited by max junction temperature. each igbt pulsed collector current 20 a p tot each igbt total dissipation at t c = 25c 33 w t scw short-circuit withstand time, v ce = 0.5 v (br)ces t j = 125 c, v cc = v boot = 15 v, v in (1) = 5 v 5s table 4. control part symbol parameter min. max unit v out output voltage applied between out u , out v , out w - gnd v boot -18 v boot + 0.3 v v cc low voltage power supply - 0.3 18 v v boot bootstrap voltage - 0.3 618 v v in logic input voltage applied between hin i , lin i and g nd for i = u, v, w - 0.3 v cc + 0.3 v dv out /dt allowed output slew rate 50 50 v/ns table 5. total system symbol parameter value unit v iso isolation withstand voltage applied between each pin and heatsink plate (ac voltage, t = 60 sec.) 2500 v t j power chips operating junction temperature -40 to 150 c t c module case operating temperature -40 to 125 c i c t c () t jmax () t c ? r thj c ? v ce sat () max () t jmax () i c t c () , () ------------------------------------------------------------------------------------------------------- =
electrical ratings STGIPS10K60A2 6/18 docid025667 rev 3 2.2 thermal data table 6. thermal data symbol parameter value unit r thjc thermal resistance junction-case single igbt max. 3.8 c/w thermal resistance junction-case single diode max. 5.5 c/w
docid025667 rev 3 7/18 STGIPS10K60A2 electrical characteristics 18 3 electrical characteristics t j = 25c unless otherwise specified. note: t on and t off include the propagation delay time of the internal drive. t c(on) and t c(off) are the switching time of igbt itself under the internally given gate driving condition. table 7. inverter part symbol parameter test conditions value unit min. typ. max. v ce(sat) collector-emitter saturation voltage v cc = v boot = 15 v, v in (1) = 5 v, i c = 5 a 1. applied between hin i , lin i and g nd for i = u, v, w. -2.12.5 v v cc = v boot = 15 v, v in (1) = 5 v, i c = 5 a, t j = 125 c -1.8 i ces collector-cut off current (v in (1) = 0 ?logic state?) v ce = 550 v v cc = v boot = 15 v -150a v f diode forward voltage v in (1) = 0 ?logic state?, i c = 5 a -1.9v inductive load switching time and energy t on turn-on time v dd = 300 v, v cc = v boot = 15 v, v in (1) = 0 5 v, i c = 5 a (see figure 4 ) - 320 - ns t c(on) crossover time (on) - 70 - t off turn-off time - 430 - t c(off) crossover time (off) - 135 - t rr reverse recovery time - 130 - e on turn-on switching losses - 65 - j e off turn-off switching losses - 75 -
electrical characteristics STGIPS10K60A2 8/18 docid025667 rev 3 figure 3. switching time test circuit figure 4. switching time definition vboot>vcc l ic vce vcc input 0 1 bus lin hin vcc lvg hvg out boot gnd am17163v1 v ce i c i c v in t on t c(on) v in(on) 10% i c 90% i c 10% v ce (a) turn-on (b) turn-off t rr 100% i c 100% i c v in v ce t off t c(off) v in(off) 10% v ce 10% i c am09223v1
docid025667 rev 3 9/18 STGIPS10K60A2 electrical characteristics 18 3.1 control part 3.1.1 ntc thermistor table 8. low supply voltage (v cc = 15 v unless otherwise specified) symbol parameter test conditions min. typ. max. unit v ccthon under voltage turn on threshold 9.1 9.6 10.1 v v ccthoff under voltage turn off threshold 7.9 8.3 8.8 v v cchys under voltage hystereses 0.9 v i qccu under voltage quiescent supply current v cc < 7.9 v 0.75 1.2 ma i qcc quiescent current v cc = 15 v 1 1.5 ma table 9. bootstrap supply (v cc = 15 v unless otherwise specified) symbol parameter test conditions min. typ. max. unit v boot_thon under voltage turn on threshold 8.5 9.5 10.5 v v boot_thoff under voltage turn off threshold 7.2 8.3 9.2 v v boothys under voltage hystereses 0.9 v i qboot quiescent current 250 a r ds(on) bootstrap driver on resistance v cc > 12.5 v 125 table 10. logic input (1) (v cc = 15 v unless otherwise specified) 1. see figure 9: dead time and interlocking definition . symbol parameter test conditions min. typ. max. unit v il low level logic input voltage 1.1 v v ih high level logic input voltage 1.8 v i il low level logic input current v in (2) = 0 2. applied between hin i , lin i and g nd for i = u, v, w -1 a i ih high level logic input current v in (1) = 15 v 20 70 a table 11. ntc thermistor symbol parameter test conditions min. typ. max. unit. r 25 resistance t = 25c 4.7 k r 125 resistance t = 125c 160 b b-constant t = 25c to 85c 3950 k t operating temperature -40 150 c
electrical characteristics STGIPS10K60A2 10/18 docid025667 rev 3 equation 1: resistance variation vs. temperature where t are temperatures in kelvin. figure 5. ntc resistance vs. temperature figure 6. ntc resistance vs. temperature (zoom) rt () r 25 e b 1 t --- 1 298 --------- - ? ?? ?? ? = am17168v1 ntc [k ] max. min. 0 20 40 60 80 100 120 140 160 180 -40-200 20406080100120140(c) center am17169v1 ntc [k ] max. min. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 50 60 70 80 90 100 110 120 130 140 (c) center
docid025667 rev 3 11/18 STGIPS10K60A2 electrical characteristics 18 minimum recommended dead time (dt) between low and high side logic input: 1 s. figure 7. maximum i c(rms) current vs. switching frequency (1) figure 8. maximum i c(rms) current vs. f sine (1) 1. simulated curves refer to typical igbt parameters and maximum r thj-c . v pn = 300 v, modulation index = 0.8, pf = 0.6, t j = 150 c, f sine = 60 hz t c = 100 c t c = 80 c i c (rms) 6 6 f sw (khz) (a) 410 8 10 12 12 81416 am03801v1 fsw = 12 khz fsw = 20 khz fsw = 16 khz v pn = 300 v, modulation index = 0.8, pf = 0.6, t j = 150 c, t c = 100 c i c (rms) 5 4 f sine (hz) (a) 1 10 6 7 8 am03802v1 figure 9. dead time and interlocking definition dt dt dt lin hin lvg hvg interlocking function am03794v1
application information STGIPS10K60A2 12/18 docid025667 rev 3 4 application information figure 10. typical application circuit am01231v1 l i n h i n h v g o u t l v g g n d l i n h i n h v g o u t l v g g n d l i n h i n v c c v boot b o o t h v g o u t l v g g n d m n t c 1 2 v-phase current w-phase current u-phase current out u v boot u vdc lin u hin u v cc gnd +15v line lin w hin w t 1 t 2 + controller p u n u v n v w n w v boot b o o t v boot b o o t out v v boot v v c c v c c lin v hin v out w v boot w c1 c 1 c2 c 2 c3 c 3 r1 r 1 t1 t 1 d1 d 1 r2 r 2 t2 t 2 d2 d 2 r3 r 3 t3 t 3 d3 d 3 r4 r 4 t4 t 4 d4 d 4 r5 r 5 t5 t 5 d5 d 5 r6 r 6 t6 t 6 d6 d 6
docid025667 rev 3 13/18 STGIPS10K60A2 application information 18 4.1 recommendations ? input signal hin,lin are active-high logic. a 500 k (typ.) pull down resistor is built-in for each high side input. if an external rc filter is used, for noise immunity, pay attention to the variation of the input signal level. ? to prevent the input signals oscillation, the wiring of each input should be as short as possible. ? by integrating an application specific type hvic inside the module, direct coupling to mcu terminals without any opto-coupler is possible. ? each capacitor should be located as nearby the pins of ipm as possible. ? low inductance shunt resistors should be used for phase leg current sensing. ? electrolytic bus capacitors should be mounted as close to the module bus terminals as possible. additional high frequency ceramic capacitor mounted close to the module pins will further improve performance. for further details, refer to an3338. table 12. recommended operating conditions symbol parameter conditions min. typ. max. unit v pn supply voltage applied between p-nu, nv, nw 300 400 v v cc control supply voltage applied between v cc -gnd 12 15 17 v v bs high side bias voltage applied between v booti -out i for i = u, v, w 11.5 17 v t dead blanking time to prevent arm-short for each input signal 1 s f pwm pwm input signal -40c < t c < 100c -40c < t j < 125c 20 khz t c case operation temperature 100 c
package information STGIPS10K60A2 14/18 docid025667 rev 3 5 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com. ecopack is an st trademark. please refer to dedicated technical note tn0107 for mounting instructions. 5.1 sdip-25l package information figure 11. sdip-25l package outline b
docid025667 rev 3 15/18 STGIPS10K60A2 package information 18 table 13. sdip-25l mechanical data dim. mm min. typ. max. a 43.90 44.40 44.90 a1 1.15 1.35 1.55 a2 1.40 1.60 1.80 a3 38.90 39.40 39.90 b 21.50 22.00 22.50 b1 11.25 11.85 12.45 b2 24.83 25.23 25.63 c 5.00 5.40 6.00 c1 6.50 7.00 7.50 c2 11.20 11.70 12.20 c3 2.90 3.00 3.10 e 2.15 2.35 2.55 e1 3.40 3.60 3.80 e2 4.50 4.70 4.90 e3 6.30 6.50 6.70 d 33.30 d1 5.55 e11.20 e1 1.40 f 0.85 1.00 1.15 f1 0.35 0.50 0.65 r 1.55 1.75 1.95 t 0.45 0.55 0.65 v0 6
package information STGIPS10K60A2 16/18 docid025667 rev 3 5.2 packing information figure 12. sdip-25l packing information am10488v1 base quantity: 11 pcs bulk quantity: 132 pcs 8123127_e
docid025667 rev 3 17/18 STGIPS10K60A2 revision history 18 6 revision history table 14. document revision history date revision changes 09-dec-2013 1 initial release. 18-feb-2014 2 ? document status promoted from target specification to preliminary data ? minor text changes 14-apr-2015 3 text edits and formatting changes throughout document updated figure 2: pin layout (bottom view) updated section 5: package information
STGIPS10K60A2 18/18 docid025667 rev 3 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2015 stmicroelectronics ? all rights reserved

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